Technical Papers and Presentations

Via Reliability – A Holistic Process Approach

This paper summarizes the results of two case studies from the IPC PCQR² Database, which document that both process capability and quality must be satisfied before initiating via reliability studies.  Relying on reliability studies alone can give a false indication of overall printed circuit board manufacturing capabilities.  Published at the IPC/JEDEC Global Conference on Lead Free Reliability and Reliability testing for RoHS Lead Free Electronics in Boston, MA; and at the SMTA Medical Electronics Symposium in Bloomington, MN by David Wolf of Conductor Analysis Technologies, Inc., April/May 2007.  Download:  Paper or Presentation

Via Reliability Test Methods

Comparison data from three reliability test methods 1) dual chamber, 2) Highly Accelerated Thermal Shock (HATS), and 3) current induced (IST) is presented.  Published at IPC Works 2005 by Tim Estes of Conductor Analysis Technologies, Inc. and Vicka White of Honeywell, Inc., October 2005.  Download

Evaluating Laminates for High Temperature Assembly

A procedure can now determine how well a particular laminate performs when exposed to 6x reflow, thermal cycling, and a combination of the two.  Published in The Board Authority by Silvio Bertling, June 2005.  Download

Reliability of Lead-Free Printed Circuit Boards

To better understand thermal reliability of lead-free PCB assemblies, a new theory proposes that higher temperature thermal cycling affects the reliability of PCB technology when assembling lead-free electronics.  Published in The Board Authority by Robert Tarzwell, June 2005.  Download

The Effect of Lead-Free Reflow Profiles on Through Via Reliability

Data from four printed circuit board manufacturers is presented on the effect of lead-free reflow profiles on through via reliability.  Published at IPC APEX/EXPO 2005 by Tim Estes of Conductor Analysis Technologies, Inc. and Bob Neves of Microtek Laboratories, February 2005.  Download

A New Cost Effective Technique For Accelerated PCB Testing

Reliability testing has become increasingly important to the electronics and PCB industries for a variety of reasons.  There has been a significant introduction of new and updated copper clad laminate materials; a variety of new interconnection techniques (i.e. blind, buried, stacked, bump, post, filled, etc.), and innovations in lamination, hole preparation, drilling and plating techniques.  All have increased the difficulty of measuring influence on interconnection reliability, requiring a search of new evaluation methods that also reduce energy consumption and cycle times.  Published in OnBoard Technology, November 2004.  Download

Highly Accelerated Thermal Shock (HATS) Testing for PCB Hole Reliability

This presentation describes a new thermal shock test methodology that builds on the history of the models created for thermal shock testing while removing the disadvantages in cost, time, and sample fixturing that are associated with traditional methods.  Published at the IPC/HKPCA International Printed Circuit and Electronics Assembly Fair, December 2003.  Download

Highly Accelerated Thermal Shock (HATS) Reliability Testing

This paper introduces a new thermal shock test methodology that builds on the history of the models created for thermal shock testing while removing the disadvantages in cost, time, and sample fixturing that are associated with traditional methods.  Published at the IPC Printed Circuits Expo, March 2003.  Download